The invention relates to a semiconductor device having an interconnection substrate and semiconductor integrated circuits located on the interconnection substrate, and an inspection contactor for inspecting the electrical continuity of a wafer to be inspected.
Hitherto, in order to realize with a low cost a semiconductor device or system LSI with high-degree, complicated functions by use of flip chip bonding in which a plurality of LSI chips are directly mounted on an interconnection substrate, a bump connection system using bumps formed of solder or metal is used as a mounting method for mounting, after independently producing chips each having a function such as microcomputer or memory etc., the produced chips on the interconnection substrate at a high density.
However, in the bump connection system using the bumps formed of the solder or metal, there is such a problem as thermal strain occurs in the bumps etc. due to difference in thermal expansion coefficient between the LSI-chips and the interconnection substrate with the result that fatigue fracture occurs in the bumps etc.
As means for preventing this problem from occurring, there is a method in which a gap defined between the LSI chip and the interconnection substrate is filled with an epoxy type thermosetting resin in which fine particles (usually called “filler”) such as glass particles etc. are included, so that thermal warp between the LSI chip and the interconnection substrate may be restrained, whereby thermal stress occurring in the metal bumps etc. are reduced to thereby improve the connection reliability of the metal bumps etc.
Further, a method disclosed in JP-A-10-270496 (a mounting method usually called “underfill structure”) is known in which an anisotropic, conductive resin is used as the epoxy type thermosetting resin in which fine particles such as glass particles etc. are included. Or, as a method of realizing the system LSI, there is known a method comprising the steps of: arranging a plurality of chips, which are individually produced previously, on an identical plane; and then electrically connecting the chips to each other by use of thin film interconnection technique.
However, in the conventional methods explained above, there are such problems as a step of filling with resin is necessary after mounting the LSI chips on the interconnection substrate with the result that a production cost thereof becomes high, and as, in a case where troubles such as defective chip etc. are found in the reliability test etc. after the assembling thereof, the filled resin must be removed to exchange the defective LSI chip with the result that much labor is required.
Further, in a case where LSI chips are mounted at a high density, it becomes indispensable, due to the increase of generated-heat occurrence density of the whole of a device, to provide a heat-dissipating mechanism for improving the heat dissipation of the whole device, which impedes the small size design of the device.
In addition, in a case of using a bonding method other than the above method using the solder bumps, it is necessary to perform with high precision the alignment between a LSI chip and electrode pads located on an interconnection substrate, which has been an obstacle to the simplification of operations for mounting the LSI chip on the substrate.